The field of the invention is that of testing integrated circuits having on-chip power supplies.
Testing integrated circuits, has become both more difficult and more important as the complexity of the circuits has increased.
The amount of resources spent in conventional burn-in and functional margin testing accounts for a non-trivial fraction of chip manufacturing cost. Sending a chip through a thermal cycle and testing it with a highly expensive automated tester is an expense that can be avoided if the chip can be eliminated by a less expensive method.
In addition, there is a class of latent defects that do not show up as fatal flaws in a conventional test, but have a high probability of causing the chip to fail.
In the past, excessive current draw has been tested by applying a voltage to the module or chip through a resistor and measuring the voltage drop across the test resistor. This procedure requires extra wiring on the chip that consumes space.
The art could benefit from a simple and inexpensive testing technique adapted to identify chips with a high probability of failing.
The invention relates to integrated circuits having an on-chip current measurement for identifying circuits that draw current above their design specifications.
A feature of the invention is use of charge pumps present on the chip.
Another feature of the invention is a digital measurement of current draw by counting cycles of the charge pump.
Another feature of the invention is the use of circuit elements already present in the chip for testing.